What are Abstract Shells? 🐚🐚

Xilinx UltraScale+ devices support DFX, which provides the ability to dynamically modify blocks of logic in your FPGA firmware while the remaining logic continues to operate without interruption.🚀

If you have used this technology you will know that generating the main configuration bitstream and the partials using Vivado can take a long time ⌛ because Vivado needs to load all the information related to the static part of the design to generate the dynamic bitstreams. Abstract shell, instead of loading a fully static design image,  contains only what is strictly necessary.

Among other things, this is very useful for:
– Reduce the compilation time of dynamic parts of the design. 👏
– Hide proprietary information that exists within the static design. 🔑Because the vast majority of the static design is removed, proprietary design information is not visible so if new users (or independent contractors🙋‍♂️) are involved, design security is a benefit as the primary user doesn’t need to shares the full static design checkpoint with the secondary user.

#FPGA#partialconfiguration#abstractshell